Semiconductors have been studied for over a century due to their attractive electronic properties [1][2]. With the explosion of interest in Integrated Circuit (IC) technology, semiconducting materials have become the basic building block of modern electronic circuits [3]. The first IC chip was fabricated in germanium by Jack Kilby in 1958, and at the same time Robert Noyce of Fairchild semiconductor introduced another IC chip in silicon using a planar technology. Since then, IC circuit design became more sophisticated and more complex, where a single chip may contain over a million transistors [3].

Semiconductors are materials that are neither good conductors nor insulators [4] and can either be in elemental (e.g. Silicon and germanium) or compound (e.g. Gallium arsenide, Indium arsenide, Aluminium phosphide, Aluminium gallium arsenide etc.) in nature [3]. They are characterised by small energy band gap of about 1eV, with all the valence electrons residing in the valence band at a temperature of 0 Kelvin. At room temperature and normal atmospheric pressure, electrons can be thermally excited and make a transition from valence band to conduction band [1].

The electrical properties of semiconducting materials can be modified by a process known as doping[4], which involves addition of impurity atoms to an intrinsic or pure semiconducting material in order to increase its number of charge carriers [5]. If a doped semiconductor material contains more free holes it is called “p-type” and when it contains mainly free electrons it is known as “n-type” [4]. P- and n-type semiconductors can be combined to form a junction called p-n junction or diode. The positive charges (holes) in the p-region move to n-region and electrons from n-region move to p-region thus, creating what is known as depletion region or depletion layer which prevents further movement of electrons/holes [6].

Recently, a number of compound semiconductors have found applications in various electronic devices [1]. The key technological advantage of these materials is the possession of direct energy band gap which is suitable for efficient absorption and emission of light [7]. Thus, the compound semiconductors are widely used for amplification, switching, and energy conversion [8]. The present work is going to explore the potentials of using Indium Arsenide (InAs) as a photodetector for amplification purposes.

1.2 Significance of This Work

Photodiodes, owing to their small size, high quantum efficiency, internal current gain and high frequency response are now being considered for a range of other applications including Light Detection and Ranging (LIDAR), imaging for military applications, toxic gas sensing and satellite based atmospheric gas content monitoring[10].In many of these applications, the optical signals reaching the photodiode may be low, necessitating some sort of amplification. Although external amplification through electric circuits has been shown to be used but it can add significant noise which affect the system’s signal-to-noise ratio. Therefore, using light detectors that can offer internal amplification without adding much noise can significantly increase the system performance.

Avalanche Photodiodes (APDs) are often detectors of choice, they can provide internal amplification gains through impact ionisation which leads to the improvement in the overall system sensitivity [9]. However, in most semiconductor devices, the impact ionisation process does introduce some noise because it is a stochastics process. While silicon APDs have excellent performance, they are limited to detecting wavelengths below one micron, and many of the applications described above require the detection of weak infrared signals. Therefore, a low production cost, low operating voltage and high-performance infrared (IR) detectors with high gain and low noise are needed.

Mercury Cadmium Telluride (HgCdTe) avalanche photodiodes have been demonstrated to achieve extremely long detection range and high multiplication gain without significant excess noise, but require expensive coolers to keep the dark current to an acceptable level [11]. Additionally, HgCdTe devices are excessively expensive due to the high growth cost of the wafers. More recently InAs has been found to exhibit HgCdTe like characteristics, with the potential to operate at high temperature and benefits from dramatically reduced substrate and epitaxial growth costs[11]. Therefore, InAs could be used as an alternative to HgCdTe.

1.3 Aim and objectives

The aim of this project is modelling and simulations of a solid-state photomultiplier.

The objectives are as follows:

To simulate the electric field profile of a single p-i-n InAs.
To compute the multiplication gain of the single p-i-n InAs.
To simulate the electric field profile of a cascaded p-i-n InAs.
To obtained the multiplication gain of the cascaded p-i-n InAs.

2. THE LITERATURE REVIEW

2.1 Energy Band Gap

According to the band theory of solids, when atoms are brought together to form a crystal, the discrete electronic energy levels of the isolated atoms combine into energy bands which represent the allowed energies for electrons in that crystal [12]. These bands are separated by forbidden regions or gaps known as energy band gap. The electrical conductivity of metals, semiconductors and insulators depends on the distribution of electrons in the allowed energy bands [3][12].

For metals, the conduction band is either partially filled or overlaps the valence band and hence no bandgap exists while for insulators, the electrons occupy all energy levels in the valence band but leaving all energy levels in the conduction band empty. On the other hand, for semiconductors at 0 k, all the electrons are in the valence band and no electron in the conduction band. Therefore, at low temperature, semiconductors are generally regarded as poor conductors. However, at room temperature, an appreciable number of electrons are thermally excited from the valence band to the conduction band [1].

Energy band gap can be best explained by energy-momentum relationships also known as the energy-band diagram which is shown in Figure 2.1 below.

Figure 2. 1: Energy-momentum Diagram [1]

In the above Figure 2.1, the energy band gap

Egrepresents the separation between the maximum energy in the valence band and the minimum energy in the conduction band and its magnitude determines the electrical conductivity of the material. If the gap is small, the material is considered as a semiconductor and if it is large, the material is considered as an insulator.

Energy gap of semiconductors could be either direct or indirect energy gap as in Figure 2.2 (a) and (b) below:

Figure 2. 2: Direct (a) and Indirect (b) Energy Band Gap [1]

Figure 2.2(a) shows the energy-momentum diagram of GaAs. The maximum in the valence band and the minimum in the conduction band both occurs at the momentum

(p=0). Therefore, electron making transition from valence band to conduction band can do so without change in momentum. Semiconductors with this property are said to be direct band gap semiconductors and widely used in lasers and other optical devices. On the other hand, Figure 2.2(b) shows the energy-momentum diagram of Si, where the maximum in the conduction band occurs at a momentum

(p=0)while the minimum in the conduction band occurs at a momentum

(p=pc).Thus, for an electron to make a transition from valence band to conduction band, it requires not only a change in energy

E, but also change in momentum [1][3]. Semiconductors with this property are said to be indirect band gap semiconductor and not suitable for used in optical devices since the lattice interactions or other scattering agents must contribute in the process to conserve the momentum [1]. The curvature of the conduction band seen in the energy-momentum diagrams is related to the electron effective mass [3] which is discussed in the section 2.1.1.

2.1.1 Effective Mass

In a semiconductor crystal, an electron in the conduction band is similar to a free electron [1]. However, the movement of electrons in a lattice is generally different from that of free electrons because, it is strongly affected by the lattice in which they move. Thus, the classical energy and momentum relationship (equation 2.1) can be modified by replacing the free electron mass with electron effective mass

m*as given by equation 2.2 [13].

E=p22m= ℏ2k22m (2.1)

Where m is the free electron mass.

E=ℏ2k22m* (2.2)

The effective mass of an electron as a function of curvature can be obtained by taking the second derivative of both sides of equation 2.2 and it is given by equation 2.3.

m*=ℏ2d2Edk2 (2.3)

Therefore, the electron effective mass of a material is inversely proportional to the material’s curvature. Materials with strong curvatures will have small effective masses and vice versa. Electron effective mass is generally expressed in units of electron rest mass in a vacuum i.e.

m*/mo[13]. Furthermore, the effective mass of a semiconductor is inversely proportional to mobility. Therefore, the smaller the effective mass the larger the mobility of that material. Compound semiconductors when compared with elemental semiconductors (Silicon) have smaller effective masses of about 0.0215 to 0.3 which is one of the reasons why they are widely used for optical applications [14].

2.1.2 Carrier Mobility

Carriers in a semiconductor crystal at room temperature are always in a state of random thermal motion which is comparable to that of atmospheric gas molecules, increase in temperature also increases the intensity of this motion. The thermal motion of an individual electron may be considered as random scattering due to the collisions with lattice atoms, impurity atoms and other scattering agents. This random motion of electrons leads to a zero-net displacement of an electron over sufficiently long period of time. With the application of small electric field, electrons will accelerate along the field but in opposite direction during the time between the collisions [1]. Therefore, moving with a velocity known as the drift velocity which is related to the applied electric field as follows:

vn=-qτcmnε (2.4)

where,

vnis the electron drift velocity,

τcis the average time between collusions known as mean free time,

mnis the effective mass of the conduction electrons.

The proportionality factor in equation 2.4 is called the electron mobility,

µngiven by:

µn≡qτcmn (2.5)

Therefore, the equation 2.4 can be written as:

vn=µnε (2.6)

Similar expressions (equations 2.5 and 2.6) can be derived for holes by replacing the effective mass of electrons with that of the holes to get:

vp≡qτcmpε (2.7)

where,

vpis the hole drift velocity,

τcis the average time between collusions known as mean free time,

mpis the effective mass of the holes. Thus,

vp=µpε (2.8)

where,

µpis the hole mobility.

Mobility is an important parameter for carrier transport, as it describes how strongly the motion of an electrons or holes are influenced by the applied electric field and it depends on effective mass and scattering time. Therefore, materials with smaller effective masses can afford larger carrier mobility. Furthermore, carrier mobility is one of the key parameters to determine the performance of a semiconductor for optoelectronic application purposes [15].

Binary compound semiconductors such as InAs, GaAs and InP possess a very low electron effective mass, exhibiting excellent carrier mobility when compared with element semiconductors such as Si [7]. A few, notably GaAs and InAs exhibit outstanding electron transport properties; the electron mobility is more than 10 times higher than in Silicon at a comparable sheet density [16]. Thus, often used in lasers, light emitting diodes and detectors for optical communication, instrumentation and sensing.

2.3 The P-n Junction

As described in the introduction, a p-n junction is formed by combining a p-type and an n-type semiconductor. The electrons in the n-region diffuse into the p-region, while the holes diffuse from the p-region to the n-region, leading to the formation of a region called the depletion region. The concentrations of acceptor (

Na) and donor (

Nd) ions determine the net negative charge on the p-type side and a net positive charge on the n-type side. The presence of these opposite charges on both regions results in the formation of electric field across the junction, which effectively prevents further movements of free carriers across the junction. To move free electrons across the depletion region, extra energy is required to overcome the force at the junction and this can be accomplished by applying electric potential between the ends of the p-n junction diode [17].

Most semiconductor devices contain at least one junction between p-type and n-type regions. The characteristics and operation of this device is determined by its connectivity [3], which can be done in either forward or reverse bias depending on the application. Forward bias is done if an external DC voltage source is connected in such a way that the terminal of p-region is connected to the positive terminal of the DC source and the n-region is connected to the negative terminal of the DC source as shown in Figure 2.3

Figure 2.3: Forward Bias Diode Configuration [18].

On the other hand, in the case of the reverse bias, the p-region of the p-n junction is connected to the negative terminal of DC source and the n-region to the positive terminal of the DC source as in Figure 2.4. Furthermore, forward and reverse bias of a p-n junction or diode can be represented by the graph known as I – V characteristics curve shown in Figure 2.5.

Figure 2.4: Reversed Bias Diode Configuration [18].

3. I-V characteristics of Zener Diode

Figure 2. 5: I – V characteristics curve of p-n junction [6]

2.4 Semiconductors Growth

Semiconductors, typically a p-n junction can be achieved by diffusion, ion implantation or epitaxial growth methods [17]. For many years, diffusion process has been employed as the main method of introducing impurity atoms such as boron, phosphorous and antimony into silicon to control the majority carrier. In this process, a temperature ranging from 800˚C to 1200˚C was used for silicon and 600˚C to 1000˚C for GaAs. The number of dopant atoms into the semiconductor are related to the partial pressure of the dopant impurity in the gas mixture [1].

The idea of using diffusion technique to form p-n junctions used in the fabrication of semiconductor devices such as transistors and diodes was first disclosed in 1952 by Pfann [19]. The diffusion process occurs in two stages: pre-deposition or simply deposition and drive-in processes. In the deposition process, the impurities are introduced into the semiconductor to a depth of about few microns and in drive-in, the impurities introduced diffuse deeper to give the desired concentration distribution without adding more impurities to the material [20]. In both stages, the impurities concentration and temperature must be accurately controlled throughout the process.

In recent years, ion implantation has been considered as an alternative to the diffusion method due its ability to show greater control of the impurity depth [21]. Although ion implantation process is more expensive, it can provide a more precise control of the dopant deposited on the wafer as well as low processing temperature when compared with diffusion process [1].

Ion implantation is widely used in industries to modify a metal surface and for medical applications [22]. In this method the dopant impurities are used to form p-n junction by bombarding a beam of energetic ions on a substrate [19]. The incident ions lose their energy through collision with electrons and nuclei in the substrate before coming to rest at some depth within the lattice. The implantation energy should be between 1 keV and 1 MeV to give ion distribution within the range of 10 nm to 10 µm respective [1]. Although the substrate used will lose some of its own ions by sputtering, it will also retain some of the incident ions [23]. Therefore, the incident ions retained by the substrate are said to have been implanted. However, there might be disruption or damage of the semiconductor lattice due to the ions collisions which will require subsequent annealing treatment to overcome these problems. Similarly, both diffusion and ion implantation methods are widely used for fabrication of discrete devices and integrated circuits [1]. Although, most semiconductor devices are mainly made up of silicon, which is very cheap and can be thermally grown through diffusion or ion implantation methods [24], however, the majority of the so-called compound semiconductor materials, which have been shown to possess unique optical and electrical properties can only be formed through the formation of multi-component alloys [7][24], which can be synthesised using epitaxial growth methods [7].

Epitaxial growth which involves the growth of a single crystal film on top of a substrate [24][25]. This can be homoepitaxial, in which the film and the substrate are made up the same material (e.g. silicon grown on silicon) or heteroepitaxial when the film and substrate are of different materials (e.g. growth of AlAs on GaAs ) [3].

Although there are many approaches that can be used for epitaxial growth, which includes Liquid Phase Epitaxy (LPE), Hydride Vapour Phase Epitaxy (HVPE), Chemical Vapour Deposition (CVD), Molecular Beam Epitaxy (MBE), Metal Organic Vapour Phase Epitaxy (MOVPE) etc.[24] however, CVD and MBE are by far the most widely used [1][3].

MBE, developed in the late 1960 and early 1970’s by Cho and Arthus has become the primary tool for understanding of surface physics, particularly those associated with the fabrication of solid state materials [7]. This method involves the reaction of one or more thermal beam of atoms or molecules with a crystalline surface under ultrahigh vacuum conditions

(~10-8 Pa).The system vacuum is maintained through the use of turbo-molecular or ion pumps. In this process, the substrate sits on a heated platen and is rotated to the sources to improve compositional and thickness uniformly. The group III-V compounds and alloys Ga, Al, In, Sb, As and P along with Si and Be are widely used as common sources [III-V compound growth].The method can enable a precise fabrication of semiconductor hetero-structures having thin layers from a fraction of micron to a mono layer [1]. Despite the importance of MBE, this technique is unlikely to be used in device manufacturing due to the high cost of the equipment and complexity. The CVD technique, on the other hand, has been shown to exhibit lower defects levels and thus, the technique is frequently employed for compound semiconductors growth [26].

CVD also known as Vapour Phase Epitaxy (VPE) involves, a chemical reaction between gaseous compounds to form epitaxial layer. The mechanism comprises of a number of steps: gas phase reaction, reactant transport to the surface, chemical reaction on the surface and desorption of reaction products from the surface [26].

In conventional silicon for instance, epitaxial growth is usually performed at or about atmospheric pressure and a temperature of about 1600ºC using silicon tetrachloride

(SiCl4), dichlorosilane

(SiH2Cl2), trichlorosilane

(SiHCl3)and silance

(SiH4)[1]. Although other silicon sources have been used successfully at a lower temperature, but it is likely going to be limited by surface reactions or even boundary layers may not be formed at all [26]. The overall reaction of

SiCl4 that results in the growth of silicon layers is given by the equation 2.9 below:

SiCl4(gas)+2H2(gas)⇌Si(solid)+4HCl(gas) (2.9)

The reaction above is reversible which means it can take place in either direction. However, due to the presence of hydrogen chloride(HCl ) in the carrier gas entering the reactor, removal or etching is needed prior to the epitaxial growth [1].

2.1 Solid-State Photodetectors

Solid-state Photodetectors are semiconductor devices that can convert optical signals in to electrical signals. This involves carrier generation, carrier transport/multiplication and interaction of photo current with the external circuit to produce the output signal [1]. The sensitivity of a material depends on its ability to absorb light in a certain wavelength range and generate electron-hole pairs that can be collected to produce an electrical signal. Currently, the demand for inexpensive photosensitive devices has been the driving force behind the development of advanced sensing devices [27]. Efforts have been made to fabricate new materials mainly compound semiconductors that are sensitive to infrared (IR) light for optical fibre communication purposes.

Avalanche photodiodes are attractive alternative solid state photodetectors due to the internal gain provided by the avalanche multiplication process [28]. They exploit the process of impact ionisation to amplify the primary photo generated current by absorption of incident photons [29].

A photodiode is a p-n junction device operating under reversed bias voltage in which incident light impinges on the valence electrons, creating electron-hole pair through impact ionisation process which results in an increase in the conductivity of a semiconducting device[30]. Impact ionisation process leads to the fluctuations in the instantaneous multiplication, as individual injected carriers undergo different levels of multiplication described by the electron and hole ionisation coefficients, representing the mean number of impact ionisation events per unit length travelled as a function of electric field [29].

Photodiodes(Figure 2.6) are designed to operate at high electric fields in order to achieve an appreciably high internal gain and low noise [9].

Figure 2.6: Avalanche Photodiode [9].

The electric field within the p-n junction increases with increase in reverse bias voltage, causing the drift velocity and kinetic energy of the charge carriers injected in the depletion region to increase. Thus, an electron or a hole can have high energy enough to break a bond when it collides with the lattice atoms, hence generating a new electron-hole pair [9]. APDs fabricated with Si and some III-V compound semiconductors such as InP, InAlAs, InGaAs can detect IR within the range of 0.3 µm to 1.7 µm but show excess noise at high gain values as both carriers are involved in the multiplication process [31]. Generally, APDs exhibit high gain, high quantum efficiency, sensitivity, low dark current, low excess noise and fast response time characteristics due to their narrow energy band gap [11][31].

2.5 Operation of Avalanche Photodiode (APD)

p-i-n photodiode, a widely-used avalanche APD, consists of an intrinsic piece of semiconductor sandwiched between two heavily doped n+ and p+ regions as shown in Figure 2.7 [32]. Applying a strong reverse biased voltage to this type of photodiode, results in a strong electric field in the charge depleted “i layer” (depletion layer) also known as the avalanche multiplication layer. This reverse bias voltage creates a depletion region in the diode which extends from the junction through the absorption region (p-region) where the photons are absorbed [9][33].

The electric field across the absorption region separates the photo-generated electron-hole pairs which results in the generation of photocurrent gain through the impact ionisation process[31][34]. As the electric field gets high enough, electrons gain kinetic energy before colliding with the lattice and hence imparting most of this energy to break the bond. The generated electron-hole pair begins to accelerate in the field and collides with the lattice which in turn, generate more electron-hole pairs. To achieve high frequency response, the depletion region must be kept thin to reduce transit time while for high quantum efficiency, the region must be sufficiently thick to allow large fraction of incident light to be absorbed. Thus, there is trade-off between the response speed and quantum efficiency [1].

Furthermore, the multiplication region of the material plays a key role in determining the multiplication gain and noise. Both the multiplication noise and gain are also determined by the ratio of the electron (α) and hole (β) ionization coefficients of the material in the multiplication region [9].

Ionisation coefficients vary from material to material, therefore accurate determination is essential to support the assessment of a material’s suitability for use in APD applications [29]. Ideally, one of the ionisation coefficients should be zero, such that their ratio often denoted by K also becomes zero [35]. Thus, noise factor approaches 2 as gain increases. However, for wider bandgap group III-V materials both carrier types undergo impact ionisation process resulting in K values ranging between approximately1 and 0.1 and hence, wider bandgap III-V APDs experience higher levels of noise than silicon APDs. Recently InAs, a narrow bandgap III-V has been shown to have the potentials of a desired electron dominated avalanche multiplication with less excess noise [29].

Figure 2. 7: PIN Avalanche photodiode [32]

2.6 **Indium Arsenide (*InAs***)

InAs is a compound semiconductor material of group III and V of the periodic table with an energy bandgap of about 0.36 eV at room temperature and 0.40 eV at 77K [29]. Its small energy band gap is what differentiates it from other wider band gap materials of group III – V [36]. It is a relatively simple binary compound that is widely available, easy to grow, processed and can cover a wide range of wavelengths (up to about 3.5µm) [11]. Currently, InAs has been considered as the alternative avalanche material for very low noise infrared APDs, owing to its achievable avalanche gain and excess noise behaviours which are highly similar to those of HgCdTe APDs [37]. Several experimental and theoretical research efforts have been made to investigate the characteristics of this semiconductor material. Mikhailova et al., [38] studied the ionisation coefficients of InAs and concluded that both electron and hole carriers participate in the avalanche multiplication. However, the Monte Carlo calculations by Brenna and Mansur [39] indicated that the electron ionisation coefficient values should be higher. In their study, Marshall et al., [11] carried out photo multiplication measurements on p-i-n and n-i-p diodes and suggest that high avalanche gain could be obtained for the case of electrons initiated multiplication. Furthermore, Marshall et al., [35] conducted a systematic study on impact ionisation, avalanche multiplication and excess noise of same semiconductor material and concluded that the material can only demonstrate HgCdTe characteristics if the avalanche multiplication is initiated by electrons.

Sandall et al., [37] conducted analytical band Monte Carlo simulations to investigate the temperature dependence of impact ionisation of same material. Their results show an excellent agreement with the available experimental data for both avalanche gain and excess noise factors at various temperatures.

To date, there has been several experimental and theoretical works on the impact ionisation, avalanche gain, temperature dependency etc. of this semiconductor material. Although multiplication gain increases with an increase in depletion width, however it is quite challenging to maintain the crystal quality during the growth of diode structures >5 µm thick [29]. Therefore, this work aims at investigating the effect of combining series of InAs depletion regions to achieve a higher gain.

3. RESEARCH METHODOLOGY

Electric field profile, impact ionisation and avalanche multiplication of a photodiode can be aided using modelling. Thus, this work involves modelling and simulations of electric field profile for a given InAs which will be used to compute multiplication gain. Furthermore, the electric field profile simulated should be sufficiently high such that electron drifting between the p-regions can undergo impact ionisation but less than 70 kV/cm to avoid band-to-band tunnelling.

3.1 The Electric Field Profile Model

The space-charge distribution and electrostatic potential of a p-n diode Ψ is given by the Poisson’s equation as in equation [1]:

d2Ψdx2=-dƐdx=-ρsƐs=-qƐsND-NA-p-n (1)

where,

ND and NA are the doping concentration of p-side and n-side,

Ɛsis the permittivity of the material and q being the electronic charge.

For region, far away from the metalogical junction, the total space density is zero i.e.

d2Ψdx2=0 and ND-NA-p-n=0 (2)

Therefore, the electrostatic potential of the p-type region is obtained by setting

ND=n=0in equation 2.

Ψp=-KTqInNAni

Ψn=-KTqInNAni

Thus, the total electrostatic potential difference between p-side and n-side neutral regions also known as built-in potential at room temperature is given by:

Vib=Ψp-Ψp=KTqInNANDni2 (3)

Furthermore, the space-charge distribution and electrostatic potential can also be obtained from equation (1) by setting p = n = 0.

d2Ψdx2=-qƐsND-NA (4)

Thus,

d2Ψdx2=-qƐsND for -xp≤x<0 (6)

d2Ψdx2=qƐsNA for 0<x≤xn (7)

The electric field is obtained by integrating equation 6 and 7

Ɛx=-dΨdx=-qNAx+xpƐs for -xp≤x<0 (8)

Ɛx=-dΨdx=-Ɛm+qƐsND =qNAx-xnƐs for -xp≤x<0 (9)

where,

Ɛmis the maximum field which exist at x = 0, and is given by:

Ɛm=qƐsNAxp=qƐsNDxn (10)

Integrating equations 8 and 9 over depletion region gives the total potential difference or built-in potential

Vbi

Vbi=qNAxp22Ɛs+qNAxn22Ɛs=12ƐmW (11)

where, W is the total depletion width given by:

W=xp+xn

xp and xpare the depletion layer width of the p-side and n-side respectively.

Therefore, the total depletion layer width as a function of the built-in potential is

W=2ƐsqNA+NDNANDVib (12)

However, for p-n junctions such as silicon and gallium arsenide, the width of neutral regions on p-side and n-side is negligible compared with the width of depletion region. Thus, the built-in potential is negligible.

Furthermore, it should be noted that, the previous equations (3 – 12) are only valid for a p-n junction at room temperature without external bias. For forward bias, the depletion layer width reduces but increases for reversed -bias and it is given by

W=2Ɛs(Vbi-V)qNB (13)

where, V is the applied potential and it is positive for forward bias and negative for revers bias,

NBis the lightly doped bulk concentration.

Therefore, the electric field can be obtained by:

Ɛm=qNBWƐs (14)

Finally, the avalanche multiplication gain in InAs as described by Ker et al. [40] is exponentially rising, similar to that of HgCdTe APDs which can be calculated from the equation given by [11].

M=exp⁡αW (15)

where, W is the width of the depletion region.

The ionisation coefficient α can be obtained from the expression in equation 16 given by Marshall et al. [11].

α=A exp⁡(-B/ε)C (16)

where, is the electric field and A, B and C are constants.

4. RESULTS

The results obtained for a single p-i-n InAs were presented in Figures 4.1 – 4.6 respectively.

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Figure 4.1: Depletion width with doping concentration of 15cm^-3

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Figure 4.2: Depletion width with doping concentration of 14 cm^-3

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Figure 4.3: The Electric Field Profile (doping concentration 15 cm^-3)

M:matlab64electric field 2.jpg

Figure 4.4: The Electric Field Profile (doping concentration 14 cm^-3)

M:matlab64gain 1.jpg

Figure 4.5: The Multiplication Gain (doping concentration 15 cm^-3)

M:matlab64gain 2.jpg

Figure 4.6: The Multiplication Gain (doping concentration 14 cm^-3)

APPENDICES

Appendix I: Project Specification

NAME: Rabiu Sanusi Koko (201224237) PROJECT CODE:ELEC 460

E-MAIL: S.K.Rabiu@liverpool.ac.uk SUPERVISOR:Dr. Ian Sandall

PROJECT TITLE: SOLID STATE PHOTOMULTIPLIER

The rapid spread and increased use of internet has caused an upsurge in the demand for highly sensitive optical detectors for high data rate optical fibre communication systems [1]. Avalanche Photodiode (APD), owing to its small size, high quantum efficiency, internal current gain and high frequency response is now being considered for a range of other applications including Light Detection and Ranging (LIDAR), imaging for military applications, toxic gas sensing and satellite based atmospheric gas content monitoring.

In many of these applications, the optical signals reaching the photodiode may be low, necessitating some sorts of amplification. Operating photodiodes as an APD can lead to an improvement in the overall system sensitivity [1]. While Silicon APDs have excellent performance, they are limited to detecting wavelengths below one micron (~ 1µm), many of the applications described above require the detection of weak infrared signals. Therefore, a low production cost, low operating voltage, high performance infrared (IR) detectors with high gain and low noise is needed.

InAshas been found to exhibit HgCdTe like characteristics, with the potential to operate at high temperatures [2], and benefits from dramatically reduced substrate and epitaxial growth costs. Thus, this work aim at investigating the effect of combining series of InAs depletion regions to achieved high gain and this could be used as an alternative to HgCdTe.

In this work, an electric field profile for a given InAs avalanche photodiode will be simulated. The electric profile simulated should be sufficiently high such that electron drifting between the p-regions can undergo impact ionisation with low electric field (˂ 70 kV/cm) to avoid band-to-band tunnelling. The results obtained will be used to compute multiplication gain which could lead to the new first true solid-state photomultiplier, since gain is deterministic and can be controlled by the number of p-regions.

[1] M. A. Othman, S. N. Taib, M. N. Husain, Z. Atfyi, and F. Mohammed, “Reviews on Avalanche Photodiode for Optical Communication Technology,” vol. 9, no. 1, pp. 35–44, 2014.

[2] I. C. Sandall, J. S. Ng, S. Xie, P. J. Ker, and C. H. Tan, “Temperature dependence of impact ionization in InAs,” vol. 21, no. 7, pp. 8630–8637, 2013.

Appendix II: Work Plan

Looking at the general topology of this project, it is mainly software development, which involves model design and writing program codes. The model adopted was fully described in section 3 (Research Methodology). After developing the model, the program code will be executed in MATLAB program available at the department of electrical engineering laboratories. The results simulated will be analysed, interpreted, and verified to make conclusions. The detailed work plan is presented in the Gantt chart in Figure 6.1, stating all the tasks to be carried out and approximate duration of each task per week.

DURATION

TASK NAME

Week 1

Week 2

Week 3

Week 4

Week 5

Week 6

Week 7

Week 8

Week 9

Week 10

Week 11

Week 12

Literature Review

Software Analysis

Model Design

Program Codes

Model Testing

Results Simulation

Model Verification

Results Analysis

Thesis Writing

D1 D2 D3 D4

Figure 1: Gantt chart

LEGEND

Milestones Deliverable

M1 Model Designed D1 Literature Review

M2 Model Tested D2 Developed Program Codes

M3 Model Verified D3 Results Simulated

M4 Results Analysed D4 Final Report

REFERENCES

[1] S. M. Sze, Semiconductor Devices: Physics and Technology, 2nd ed. New York: John Wiley & Sons, 2002.

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